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/*----------------------------------------------------------------------------
 * Notice of Export Control Law
 * ===============================================
 * Huawei LiteOS may be subject to applicable export control laws and regulations, which might
 * include those applicable to Huawei LiteOS of U.S. and the country in which you are located.
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#include "host_common.h"
#include "spi_common.h"

#include "hisfc350.h"

/* MXIC QE(bit) include in Status Register */
#define MX_SPI_NOR_SR_QE_SHIFT    6
#define MX_SPI_NOR_SR_QE_MASK    (1 << MX_SPI_NOR_SR_QE_SHIFT)

/*****************************************************************************/
/*
   enable QE bit if QUAD read write is supported by SPI
*/
int spi_mx25l25635e_qe_enable(struct spi *spi)
{
    unsigned char op;
    unsigned int reg;
    struct spinor_host *host = (struct spinor_host *)spi->host;

    op = hisfc350_spi_is_quad(spi);

    reg = hisfc350_read_reg(spi, SPI_CMD_RDSR);
    if (((reg & MX_SPI_NOR_SR_QE_MASK) >> MX_SPI_NOR_SR_QE_SHIFT)
            == op) {
        return op;
    }

    spi->driver->write_enable(spi);

    if (op) {
        reg |= MX_SPI_NOR_SR_QE_MASK;
    } else {
        reg &= ~MX_SPI_NOR_SR_QE_MASK;
    }
    reg_write(host, reg, HISFC350_CMD_DATABUF0);

    reg = SPI_CMD_WRSR;
    reg_write(host, reg, HISFC350_CMD_INS);

    reg = HISFC350_CMD_CONFIG_DATA_CNT(SPI_NOR_SR_LEN)
          | HISFC350_CMD_CONFIG_DATA_EN
          | HISFC350_CMD_CONFIG_SEL_CS(spi->cs)
          | HISFC350_CMD_CONFIG_START;
    reg_write(host, reg, HISFC350_CMD_CONFIG);

    HISFC350_CMD_WAIT_CPU_FINISH(host);

    return op;
}

